The present embodiments relate to a method of forming different devices types on the same integrated circuit, and more particularly to integrating non-MOS transistor devices with CMOS devices on the same integrated circuit.
As semiconductor processes and lithography continue to improve, transistor switching speeds continue to improve, which results in higher performance circuit functions. The circuits provide their outputs to other circuits. Often buses that are relatively long carry these signals. These buses inherently have capacitance and resistance so that an RC delay is present for an electrical signal being carried by the bus. The buses can be made bigger to reduce the resistance but that can also increase capacitance. Also there can be a great number of buses so that increasing bus size can cause the size of the integrated circuit to increase as well. The net effect is that the carrier of the signal is often a major speed limitation. Thus, additional increases in transistor switching speed can result in relatively small increases in overall speed of operation. Furthermore, the need to integrate a multitude of different device types (such as, RF, bipolar, and photonic enabled devices) on broad reaching CMOS platform technologies are desirable for low-cost manufacturing integration.
One difficulty has been finding a practical way to take advantage of multiple device integration for improved signal routing or increased integrated circuit functionality. One major issue is the integration of dissimilar device types on an integrated circuit chip in a manner that is manufacturable and consistent with transistor manufacturing considerations. The considerations are different for the two type devices and either device can become marginally functional or prohibitively expensive.
Furthermore, discrete non-MOS transistor components are often high cost components. While integrating non-MOS transistor devices on silicon can provide a low-cost solution, examples of such devices which have been demonstrated in single SOI are subject to imperfections in the manufacturing process, such as, geometry non-uniformity and imprecise dopant profiles in what can be complex 3-dimensional geometries. Such geometry non-uniformity can induce variations in device characteristics and thus degrade a desired device performance.
Many non-MOS transistor devices are based upon a diode or a series of diodes. Examples of non-MOS transistor devices include, but are not limited to, a bipolar transistor, an RF device, a photonic enabled device. The electrical properties of the diode influence the performance of the non-MOS transistor device. However, precise location of the dopants within the diode are necessary across the wafer to improve manufacturing yields of such a device. Furthermore, non-MOS transistor devices may have different requirements on geometries other than what is required for high performance CMOS. RF device and photonic enabled device performance, for example, is very geometry dependent per device type. However, the standard high performance CMOS flow for making CMOS devices is inadequate for processing such non-MOS transistor devices.
Accordingly, it would be desirable to provide an improved method for integrating non-MOS transistor devices with CMOS electronic devices on the same integrated circuit allowing for high yields at the desired performance levels. In addition, it would be desirable to provide a method for manufacturing a non-MOS transistor device for overcoming the problems in the art.